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SOI wafer

SOI wafer

Silicon-On-Insulator (SOI) wafer


Si + SiO2 + Si

Standard Diameter

4-inch(100mm), 6-inch(150mm), 8-inch(200mm)

Also can cut as 10×10mm, 25×25mm etc.





Handle wafer thickness

300um ~ 1000um


10~20 ohm-cm or others



Buried Oxide layer
(Box layer)

0.1um ~ 4um



Device layer

2um ~ 500um




N-type/P-doped, Undoped


10~20 ohm-cm or others

SOI wafer is mean the Silicon-On-Insulator wafer which is silicon on an insulating substrate (Si + SiO2 + Si), and a buried oxide layer is introduced between the top silicon and the back substrate.

By forming a semiconductor thin film on an insulator, SOI wafer materials have advantages that are incomparable to bulk silicon: It can realize the dielectric isolation of components in integrated circuits, completely eliminating the parasitic latch-up effect in bulk silicon CMOS circuits. The integrated circuit made of SOI also has the advantages of small parasitic capacitance, high integration density, high speed, simple process, smaller short channel effect, and especially suitable for low voltage and low power circuits. SOI will become the mainstream technology for deep submicron low voltage, low power integrated circuits. In addition, SOI materials are also used to fabricate MEMS optical switches,

SOI advantages:
1) Reduced parasitic capacitance and increased operating speed. Compared to bulk silicon materials, SOI devices operate at speeds of 20-35%;
2) has lower power consumption. SOI device power consumption can be reduced by 35-70% due to reduced parasitic capacitance and reduced leakage;
3) Eliminate the latch-up effect;
4) suppressing the pulse current interference of the substrate and reducing the occurrence of soft errors;
5) Compatible with existing silicon processes to reduce processes by 13-20%.
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